The invention relates generally to semiconductor memories and more particularly to non-volatile ferro electric memories.
Semiconductor memories are widely used in many digital systems. These memories generally contain an array of memory cells fabricated on a semiconductor substrate. A plurality of row select lines, and a plurality of column select lines are connected to the memory cells. One memory cell is connected at the intersection of each row select line and each column select line.
By applying a signal to one row select line and one column select line, the memory cell at the intersection of those lines can be accessed. An access may consist of "reading" or "writing" to the memory cell. Each memory cell is constructed to store one bit of information, and the binary value of the bit stored in a cell can be altered during a write operation or placed on an output line during a read operation.
Many memory cells are constructed such that power must be continuously applied in order for the cell to maintain the stored information. In some systems, however, it is important for information to be retained even when power to the system is turned off. In those systems, non-volatile memory cells are used.
Ferroelectric materials have been used for non-volatile memory cells. For example, U.S. Pat. Nos. 4,713,157 issued in the name of McMillan et al., and 4,707,897 issued in the name of Rohrer et al., disclose ferroelectric semiconductor memories. As is known, ferroelectric materials become polarized when they are placed in a sufficiently strong electric field. Importantly for use in non-volatile memories, ferroelectrics maintain this polarization when removed from the electric field. In fact, an ideal ferroelectric maintains the polarization until placed in a sufficiently strong electric field of the opposite polarity.
When used in memory cells, the ferroelectric material is formed into a structure which operates as a capacitor. The "capacitor" is connected between the row and column select lines. An electric field through the ferroelectric material in a memory cell is created by a voltage applied across the select lines which access that memory cell. A positive voltage exceeding a particular value, called the coercive threshold voltage, polarizes the ferroelectric in a positive direction. A negative voltage exceeding the coercive threshold voltage polarizes the ferroelectric material in the negative direction. To store a bit having a logic "1" in the cell, a positive voltage is applied. To store a bit having a logic "0", a negative voltage is applied.
To read out the information in a cell, a positive voltage exceeding the coercive threshold voltage is applied and the current flow into the cell is measured. When the cell has a negative polarization and a positive voltage is applied, the polarization changes. A substantial displacement current flows into the cell. Thus, a large current flow during the read indicates a logic 0 stored in the cell. Conversely, a very small current flow during the read operation indicates a logic 1.
After the positive voltage is applied to read the cell, the cell stores a logic 1 regardless of what value was stored before the reading (i.e. a destructive read out). Thus, each time a cell is read out, the value stored in the memory must be detected and written into the memory cell. Ferroelectric memories, therefore, contain control logic which restores the value read from the cell back into the cell after the read operation.
Since semiconductor memories contain numerous cells, voltages must only be applied across the selected cell during a read or write operation. When no cells are being accessed, all the select lines are at the reference potential. To access a cell joining a particular row and a particular column select line, a positive voltage equal to one-half the coercive threshold voltage is applied to one select line and a negative voltage also equal to one-half of the coercive threshold voltage is applied to the other select line. A voltage equal to the coercive threshold voltage is thus applied across the selected cell. The polarity of the applied voltage is determined by whether the positive or negative voltage is applied to the row or column select line.
The maximum voltage which develops across any cell other than the selected cell is one-half the coercive threshold voltage. For an ideal ferroelectric material, such a voltage should have no effect because a voltage exceeding the coercive threshold voltage must be applied to change the polarization of the ferroelectric material. In real ferroelectrics, however, such an applied voltage causes what is known as a "half select phenomenon". The polarization of the cells exposed to even one-half the coercive threshold voltage gradually changes. These gradual changes in polarization may disrupt information stored in the memory in an unpredictable manner and are thus undesirable.
An additional drawback of existing ferroelectric semi conductor memories is that both a positive and negative voltage source are required. Having both polarity voltage sources requires components which can handle both polarities to drive the select lines. CMOS devices are symmetrical and can handle both polarities of voltage and are generally used. In some cases, however, it would be desirable to use bipolar devices which do not easily handle both polarities of voltage.